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HA5022/883
January 1995
Dual 125MHz Video Current Feedback Amplifier with Disable
Description
The HA5022/883 is a dual version of the popular Intersil HA5020. It features wide bandwidth and high slew rate, and is optimized for video applications and gains between 1 and 10. It is a current feedback amplifier and thus yields less bandwidth degradation at high closed loop gains than voltage feedback amplifiers. The low differential gain and phase, 0.1dB gain flatness, and ability to drive two back terminated 75 cables, make this amplifier ideal for demanding video applications. The HA5022/883 also features a disable function that significantly reduces supply current while forcing the output to a true high impedance state. This functionality allows 2:1 video multiplexers to be implemented with a single IC. The current feedback design allows the user to take advantage of the amplifier's bandwidth dependency on the feedback resistor. By reducing RF , the bandwidth can be increased to compensate for decreases at higher closed loop gains or heavy output loads.
Features
* This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. * Dual Version of HA-5020 * Individual Output Enable/Disable * Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . 125MHz * Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/s * Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03% * Differential Phase. . . . . . . . . . . . . . . . . . . . . . . 0.03 Deg. * Supply Current (per Amplifier) . . . . . . . . . . . . . . .7.5mA * Crosstalk Rejection at 10MHz. . . . . . . . . . . . . . . . -60dB * ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V * Guaranteed Specifications at 5V Supplies
Applications
* Video Multiplexers; Video Switching and Routing * Video Gain Block * Video Distribution Amplifier/RGB Amplifier * Flash A/D Driver * Current to Voltage Converter * Radar and Imaging Systems * Medical Imaging
Ordering Information
PART NUMBER HA5022MJ/883 TEMPERATURE RANGE -55oC to +125oC PACKAGE 16 Lead CerDIP
Pinout
HA5022/883 (CERDIP) TOP VIEW
-IN1 +IN1 DIS1 VDIS2 +IN2 -IN2 NC 1 2 3 4 5 6 7 8 + + 16 OUT1 15 NC 14 NC 13 V+ 12 NC 11 NC 10 OUT2 9 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
Spec Number
256
511107-883 File Number 3729.1
Specifications HA5022/883
Absolute Maximum Ratings
Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to VOutput Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protected Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . < 2000V Storage Temperature Range . . . . . . . . . . . . . . -65oC TA +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC
Thermal Information
Thermal Resistance JA JC CerDIP Package . . . . . . . . . . . . . . . . . 75oC/W 20oC/W Maximum Package Power Dissipation at +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.33W Package Power Dissipation Derating Factor above +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.3mW/oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . 5V to 15V Operating Temperature Range . . . . . . . . . . . . .-55oC TA +125oC VINCM 1/2(V+ - V-) VDISABLE = V+ or 0V RL 50 RF = 1k
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = 5V, AV = +1, RF = 1k, RSOURCE = 0, RL = 400, VOUT = 0V, VDISABLE = V+, Unless Otherwise Specified. LIMITS PARAMETERS Input Offset Voltage SYMBOL VIO CONDITIONS VCM = 0V GROUP A SUBGROUPS 1 2, 3 Common Mode Rejection Ratio CMRR VCM = 2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V VCM = 2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V Power Supply Rejection Ratio PSRR VSUP = 1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V VCM = 0 1 2 3 TEMPERATURE +25oC +125oC, -55oC +25 C +125oC -55oC
o
MIN -3 -5 53 38 38
MAX 3 5 -
UNITS mV mV dB dB dB
1 2, 3 1 2,3
+25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC -55oC
60 55 -8 -20 -
3.5 3.5 8 20 0.15 2.0 2.0
dB dB mV mV A A A/V A/V A/V
Delta Input Offset Voltage Between Channels Non-Inverting Input (+IN) Current +IN Current Common Mode Sensitivity
VIO
IBSP
VCM = 0V
1 2, 3
CMSIBP
VCM = 2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V VCM = 2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V
1 2 3
Inverting Input (-IN) Current Between Channels Inverting Input (-IN) Current
IBSN
VCM = 0
1 2, 3
+25oC +125oC +25oC +125oC, -55oC
-15 -30 -12 -30
15 30 12 30
A A A A
IBSN
VCM = 0V
1 2, 3
Spec Number 257
511107-883
Specifications HA5022/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 5V, AV = +1, RF = 1k, RSOURCE = 0, RL = 400, VOUT = 0V, VDISABLE = V+, Unless Otherwise Specified. LIMITS PARAMETERS -IN Current Common Mode Sensitivity SYMBOL CMSIBN CONDITIONS VCM = 2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V VCM = 2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V -IN Current Power Supply Sensitivity PSSIBN VSUP = 1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V VSUP = 1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V AV = +1 VIN = -3V RL = 150 VIN = -3V AV = +1 VIN = +3V RL = 150 VIN = +3V VIN = 2.5V VOUT = 0V VIN = 2.5V VOUT = 0V Note 1 GROUP A SUBGROUPS 1 2 3 TEMPERATURE +25 C +125oC -55oC
o
MIN -
MAX 0.4 5 5
UNITS A/V A/V A/V
1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3 1 2, 3
+25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125o C, -55 C
o
2.5 2.5 50 50 20 16.6 -10 -10 1 0.5 0.5 1 0.5 0.5
0.2 0.5 0.1 0.3 -2.5 -2.5 -40 -40 -20 -16.6 10 10 -
A/V A/V A/V A/V V V V V mA mA mA mA mA mA mA mA mA/Op Amp mA/Op Amp mA/Op Amp mA/Op Amp M M M M M M
+IN Current Power Supply Sensitivity
PSSIBP
Output Voltage Swing
VOP
VON
Short Circuit Output Current
+ISC
-ISC
Output Current
+IOUT
-IOUT
Note 1
1 2, 3
Quiescent Power Supply Current
ICC
RL = 400
1 2, 3
+25oC +125oC, -55oC
IEE
RL = 400
1 2, 3
+25oC +125oC, -55oC
Transimpedance
+AZOL1
RL = 400 VOUT = 2.5V VOUT = 2.25V
1 2 3 1 2 3
+25oC +125
oC
-55oC +25oC +125oC -55oC
-AZOL1
RL = 400 VOUT = 2.5V VOUT = 2.25V
Spec Number 258
511107-883
Specifications HA5022/883
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 5V, AV = +1, RF = 1k, RSOURCE = 0, RL = 400, VOUT = 0V, VDISABLE = V+, Unless Otherwise Specified. LIMITS PARAMETERS Disabled Output Current SYMBOL +ILEAK CONDITIONS VIN = 0V, VOUT = +2.5V RL = Open, VDIS = 0V VIN = 0V, VOUT = -2.5V RL = Open, VDIS = 0V VDIS = 0V GROUP A SUBGROUPS 1 2, 3 1 2, 3 1 2, 3 Minimum DISABLE Pin Current to Disable Maximum DISABLE Pin Current to Enable Disabled Power Supply Current IDIS Note 2 1 2, 3 IEN Note 3 1 2, 3 ICCDIS RL = Open, VDIS = 0V 1 2, 3 IEEDIS NOTES: 1. Guaranteed from VOUT Test with RL = 150, by: IOUT = VOUT/150. 2. RL = 100, VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is considered disabled when -10mV VOUT +10mV. 3. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5022/883 remaining enabled. The HA5022/883 is considered disabled when the supply current has decreased by at least 0.5mA. RL = Open, VDIS = 0V 1 TEMPERATURE +25 C +125oC, -55oC +25oC +125 C, -55 C +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC
o o o
MIN -1.0 -1.5 20 20 7.5
MAX 1 2 1 2 350 350 7.5 7.5 -
UNITS A A A A mA mA A A A A mA/Op Amp mA/Op Amp mA/Op Amp
-ILEAK
Disable Pin Input Current
ILOGIC
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = 5V, AV = +2, RF = 681, RL = 400, Unless Otherwise Specified. LIMITS PARAMETERS -3dB Bandwidth SYMBOL BW(+1) CONDITIONS AV = +1, RF = 1K VOUT = 100mVRMS AV = +2, VOUT = 100mVRMS AV = +2, f 5MHz VOUT = 100mVRMS AV = +2, f 10MHz VOUT = 100mVRMS AV = +2, f 20MHz VOUT = 100mVRMS NOTES 1 TEMPERATURE +125oC, -55oC MIN 70 MAX UNITS MHz
BW(+2)
1
+125oC, -55oC
70
-
MHz
Gain Flatness
GF5
1
+125oC, -55oC
-
0.045 0.085 0.65
dB
GF10
1
+125oC, -55oC
-
dB
GF20
1
+125oC, -55oC
-
dB
Spec Number 259
511107-883
Specifications HA5022/883
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Characterized at: VSUPPLY = 5V, AV = +2, RF = 681, RL = 400, Unless Otherwise Specified. LIMITS PARAMETERS Slew Rate SYMBOL +SR(+1) CONDITIONS AV = +1, RF = 1K VOUT = -2V to +2V AV = +1, RF = 1K VOUT = +2V to -2V AV = +2, VOUT = -2V to +2V AV = +2, VOUT = +2V to -2V AV = +2, VOUT = -0.5V to -0.5V AV = +2, VOUT = +0.5V to +0.5V AV = +2, VOUT = -0.5V to +0.5V AV = +2, VOUT = +0.5V to -0.5V AV = +2, RF = 681 VOUT = 0V to 1V AV = +2, RF = 681 VOUT = 1V to 0V NOTES 1, 4 TEMPERATURE +125oC, -55oC MIN 300 MAX UNITS V/s
-SR(+1)
1, 4
+125oC, -55oC
270
-
V/s
+SR(+2) -SR(+2) Rise and Fall Time TR TF Overshoot +OS -OS Propagation Delay +TP
1, 4 1, 4 1, 2 1, 2 1, 3 1, 3 1, 2
+125oC, -55oC +125oC, -55oC +125oC, -55oC +125oC, -55oC +125oC, -55oC +125oC, -55oC +125oC, -55oC
465 350 -
5.5 6.0 35 27 10
V/s V/s ns ns % % ns
-TP
1, 2
+125oC, -55oC
-
9.5
ns
NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot-to-lot and within lot variation. 2. Measured between 10% and 90% points. 3. For 200ps input transition times. Overshoot decreases as input transition times increase, especially for AV = +1. Please refer to Performance Curves. 4. Measured between 25% and 75% points.
TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS Interim Electrical Parameters (Pre Burn-In) Final Electrical Test Parameters Group A Test Requirements Groups C and D Endpoints NOTE: 1. PDA applies to Subgroup 1 only. SUBGROUPS (SEE TABLE 1) 1 1 (Note 1), 2, 3, 4 1, 2, 3, 4 1
Spec Number 260
511107-883
HA5022/883 Test Circuits and Waveforms
V+ VIN K1 NC K2 = POSITION 1: VX VIO = 100 VX x100 K2 = POSITION 2: VX -IBIAS = 50K +IBIAS = VZ 100K VZ HA-5177 VD 200pF 100K (0.01%) 50 + 0.1 + 10 0.1 IEE V0.1 K3 + 0.1 0.1 ICC 510 + 10 0.1
0.1
0.1 100
1K 1, 7 -
13 16, 10 DUT 3, 5 100 400 K5 NC K6 1K VOUT
470pF
2
1K 2, 6 + 510
K2 1
4
NOTE: All Resistors = 1% () All Capacitors = 10% (F) Unless Otherwise Noted Chip Components Recommended
FIGURE 1. TEST CIRCUIT (Applies to Table 1)
+
DUT
50 HP4195 NETWORK ANALYZER
50
FIGURE 2. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS
VIN VOUT RL 100 RF , 1K 50 RI 681 RF , 681 DUT VOUT RL 400
VIN 50
+
DUT
+
-
-
FIGURE 3. SMALL SIGNAL PULSE RESPONSE CIRCUIT
FIGURE 4. LARGE SIGNAL PULSE RESPONSE CIRCUIT
FIGURE 5. SMALL SIGNAL RESPONSE Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div. Horizontal Scale: 20ns/Div.
FIGURE 6. LARGE SIGNAL RESPONSE Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div. Horizontal Scale: 50ns/Div.
Spec Number 261
511107-883
HA5022/883 Burn-In Circuit
HA5022MJ/883 CERAMIC DIP
R3
R2 1 R1 2 D4 VD2 C2 R4 6 R5 7 8 3 4 5
+
16 15 14 13 12 C1 D1 D3 V+
+ -
11 10 9
R6
NOTES: R1 = R2 = R4 = R5 = 1k, 5% (Per Socket) R3 = R6 = 10k, 5% (Per Socket) C1 = C2 = 0.01F (Per Socket) or 0.1F (Per Row) Minimum D1 = D2 = 1N4002 or Equivalent (Per Board) D3 = D4 = 1N4002 or Equivalent (Per Socket) V+ = +5.5V 0.5V V- = -5.5V 0.5V
Spec Number 262
511107-883
HA5022/883 Die Characteristics
DIE DIMENSIONS: 65 x 100 x 19 mils 1 mils 1650 x 2540 x 483m 25.4m METALLIZATION: Type: Metal 1: AlCu (1%), Metal 2: AlCu (1%) Thickness: Metal 1: 8kA 0.4kA, Metal 2: 16kA 0.8kA WORST CASE CURRENT DENSITY: 1.62 x 105 A/cm2 at 35mA SUBSTRATE POTENTIAL (Powered Up): VGLASSIVATION: Type: Nitride Thickness: 4kA 0.4kA TRANSISTOR COUNT: 124 PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA5022/883
OUT1 -IN1
V+ +IN1
DIS1
VNC
DIS2
+IN2
OUT2
-IN2
Spec Number 263
511107-883
HA5022/883 Ceramic Dual-In-Line Frit Seal Packages (CerDIP)
c1 -A-DBASE METAL E b1 M -Bbbb S BASE PLANE SEATING PLANE S1 b2 b ccc M C A-B S AA C A-B S D Q -CA L DS M (b) SECTION A-A (c) LEAD FINISH
F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A)
16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE INCHES SYMBOL A b b1 b2 b3 c MIN 0.014 0.014 0.045 0.023 0.008 0.008 0.220 MAX 0.200 0.026 0.023 0.065 0.045 0.018 0.015 0.840 0.310 MILLIMETERS MIN 0.36 0.36 1.14 0.58 0.20 0.20 5.59 MAX 5.08 0.66 0.58 1.65 1.14 0.46 0.38 21.34 7.87 NOTES 2 3 4 2 3 5 5 6 7 2, 3 8 Rev. 0 4/94
eA
c1 D E e eA eA/2 L Q S1
e
DS
eA/2
c
0.100 BSC 0.300 BSC 0.150 BSC 0.125 0.015 0.005 90o 16 0.200 0.060 105o 0.015 0.030 0.010 0.0015
2.54 BSC 7.62 BSC 3.81 BSC 3.18 0.38 0.13 90o 16 5.08 1.52 105o 0.38 0.76 0.25 0.038
aaa M C A - B S D S
NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH.
aaa bbb ccc M N
Spec Number 264
511107-883
HA5022
DESIGN INFORMATION
Dual 125MHz Video Current Feedback Amplifier with Disable
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
+5 +4 NORMALIZED GAIN (dB) +3 +2 +1 0 -1 -2 -3 -4 -5 2 10 FREQUENCY (MHz) AV = 10, RF = 383 VOUT = 0.2VP-P CL = 10pF AV = 2, RF = 681 AV = 5, RF = 1k
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified.
+5 AV = 1, RF = 1k NORMALIZED GAIN (dB) +4 +3 +2 +1 0 -1 -2 -3 -4 100 200 -5 2 10 FREQUENCY (MHz) 100 200 AV = -10 AV = -5 VOUT = 0.2VP-P CL = 10pF RF = 750 AV = -1 AV = -2
FIGURE 1. NON-INVERTING FREQUENCY RESPONSE
NONINVERTING PHASE (DEGREES) INVERTING PHASE (DEGREES) +180 +135 AV = -1, RF = 750 AV = +10, RF = 383 +90 +45 0 -45 AV = -10, RF = 750 VOUT = 0.2VP-P CL = 10pF 2 10 FREQUENCY (MHz) 100 -90 -135 -180 200
FIGURE 2. INVERTING FREQUENCY RESPONSE
140
0 -45 -90 -135 -100 -225 -270 -315 -360
AV = +1, RF = 1k
-3dB BANDWIDTH (MHz)
130
120
-3dB BANDWIDTH
10
5 GAIN PEAKING 500 700 900 1100 1300 FEEDBACK RESISTOR () 0 1500
FIGURE 3. PHASE RESPONSE AS A FUNCTION OF FREQUENCY
100 VOUT = 0.2VP-P CL = 10pF AV = +2 GAIN PEAKING (dB) 95 -3dB BANDWIDTH 90 10
FIGURE 4. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
130
-3dB BANDWIDTH (MHz)
-3dB BANDWIDTH (MHz)
120 -3dB BANDWIDTH 110 6 GAIN PEAKING (dB)
100
4
5 GAIN PEAKING 350 500 650 800 950 FEEDBACK RESISTOR () 0 1100
90
GAIN PEAKING
80 0 200 400 600
VOUT = 0.2VP-P CL = 10pF AV = +1 800
2
0 1000
LOAD RESISTOR ()
FIGURE 5. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE
FIGURE 6. BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE
265
GAIN PEAKING (dB)
VOUT = 0.2VP-P CL = 10pF AV = +1
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
80
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified.
(Continued)
16 VOUT = 0.2VP-P CL = 10pF AV = +10 60 OVERSHOOT (%) 12 VOUT = 0.1VP-P CL = 10pF VSUPPLY = 5V, AV = +2
-3dB BANDWIDTH (MHz)
40
6
VSUPPLY = 15V, AV = +2 VSUPPLY = 5V, AV = +1 VSUPPLY = 15V, AV = +1
20
0
200
350
500 650 FEEDBACK RESISTOR ()
800
950
0
0
200
400 600 LOAD RESISTANCE ()
800
1000
FIGURE 7. BANDWIDTH vs FEEDBACK RESISTANCE
FIGURE 8. SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE
0.08
0.10 FREQUENCY = 3.58MHz 0.08 RL = 75 DIFFERENTIAL PHASE (DEGREES) DIFFERENTIAL GAIN (%)
FREQUENCY = 3.58MHz
0.06
0.06 RL = 150
0.04 RL = 150 RL = 75
0.04
0.02 RL = 1k 0.00 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15
0.02 RL = 1k 0.00 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15
FIGURE 9. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE
-40 VOUT = 2.0VP-P CL = 30pF -50
FIGURE 10. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE
AV = +1
0 -10 REJECTION RATIO (dB) HD2 -20 -30 -40 -50 -60 -70 -80 HD3
DISTORTION (dBc)
-60 3RD ORDER IMD -70 HD2 HD3 -80
CMRR
NEGATIVE PSRR POSITIVE PSRR 0.01 0.1 FREQUENCY (MHz) 1 10 30
-90 0.3
1 FREQUENCY (MHz)
10
0.001
FIGURE 11. DISTORTION vs FREQUENCY
FIGURE 12. REJECTION RATIOS vs FREQUENCY
266
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
8.0 PROPAGATION DELAY (ns) RL = 100 VOUT = 1.0VP-P AV = +1 7.5
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified.
(Continued)
12 RLOAD = 100 VOUT = 1.0VP-P PROPAGATION DELAY (ns) 10 AV = +10, RF = 383
7.0
8 AV = +2, RF = 681 6 AV = +1, RF =1k
6.5
6.0
4 -50 -25 0 +25 +50 TEMPERATURE (oC) +75 +100 +125 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 15
FIGURE 13. PROPAGATION DELAY vs TEMPERATURE
500 VOUT = 20VP-P 450 SLEW RATE (V/s) 400 350 300 250 200 150 100 -50 -25 0 +25 +50 +75 TEMPERATURE (oC) +100 +125 - SLEW RATE
FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE
+0.8 +0.6 +0.4 NORMALIZED GAIN (dB) VOUT = 0.2VP-P CL = 10pF
+ SLEW RATE
+0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 5 10 15 20 FREQUENCY (MHz) 25 30 AV = 10, RF =383 AV = +1, RF = 1k AV= +5, RF = 1k AV= +2, RF = 681
FIGURE 15. SLEW RATE vs TEMPERATURE
+0.8 +0.6 NORMALIZED GAIN (dB) +0.4 +0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 -1.2 5 AV = -10 10 15 20 AV = -2 25 30 AV = -5 AV = -1
FIGURE 16. NON-INVERTING GAIN FLATNESS vs FREQUENCY
100 AV = 10, RF = 383 80 -INPUT NOISE CURRENT 800 CURRENT NOISE (pA/Hz) VOLTAGE NOISE (nV/Hz) 1000
VOUT = 0.2VP-P CL = 10pF RF = 750
60 +INPUT NOISE CURRENT 40
600
400
20 0 0.01
200
0.1
1 10 FREQUENCY (kHz)
0 100
FREQUENCY (MHz)
+INPUT NOISE VOLTAGE
FIGURE 17. INVERTING GAIN FLATNESS vs FREQUENCY
FIGURE 18. INPUT NOISE CHARACTERISTICS
267
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
1.5
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified.
(Continued)
2
1.0 VIO (mV)
BIAS CURRENT (A)
0
0.5
-2
0.0 -60
-40
-20
0
+20
+40
+60 (oC)
+80 +100 +120 +140
-4 -60
-40
-20
0
+20
+40
+60
o
+80 +100 +120 +140
TEMPERATURE
TEMPERATURE ( C)
FIGURE 19. INPUT OFFSET VOLTAGE vs TEMPERATURE
22
FIGURE 20. +INPUT BIAS CURRENT vs TEMPERATURE
4000
TRANSIMPEDANCE (k) -40 -20 0 +20 +40 +60 +80 +100 +120 +140
BIAS CURRENT (A)
20
3000
18
2000
16 -60
1000 -60
-40
-20
0
+20
+40
+60
+80 +100 +120 +140
TEMPERATURE (oC)
TEMPERATURE (oC)
FIGURE 21. -INPUT BIAS CURRENT vs TEMPERATURE
25 +125oC REJECTION RATIO (dB) 20 ICC (mA) +55oC
FIGURE 22. TRANSIMPEDANCE vs TEMPERATURE
74 72 70 68 66 64 62 60 58 -100 CMRR -PSRRN +PSRR
15
10 +25oC 5 3 4 5 6 7 8 9 10 11 12 13 14 15
-50
0
+50
+100
+150
+200
+250
SUPPLY VOLTAGE (V)
TEMPERATURE (oC)
FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 24. REJECTION RATIO vs TEMPERATURE
268
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
40 SUPPLY CURRENT (mA)
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified.
(Continued)
4.0
30
+5V
+10V
+15V
OUTPUT SWING (V)
20
3.8
10
0 0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
3.6 -60
-40
-20
0
+20
+40
+60
+80 +100 +120 +140
DISABLE INPUT VOLTAGE (V)
TEMPERATURE (oC)
FIGURE 25. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE
30 1.2
FIGURE 26. OUTPUT SWING vs TEMPERATURE
VCC = 15V VOUT (VP-P) VIO (mV) 20
1.1
VCC = 10V 10
1.0
0.9 VCC = 4.5V 0 0.01 0.8 0.10 1.00 10.00 -60 -40 -20 0 +20 +40 +60 +80 +100 +120 +140 LOAD RESISTANCE (k) TEMPERATURE (oC)
FIGURE 27. OUTPUT SWING vs LOAD RESISTANCE
FIGURE 28. INPUT OFFSET VOLTAGE CHANGE BETWEEN CHANNELS vs TEMPERATURE
30 -55oC +25oC 20 ICC (mA)
1.5
BIAS CURRENT (A)
25 1.0
15
0.5
10
+125oC
0.0 -60 -40 -20 0 +20 +40 +60 +80 +100 +120 +140 TEMPERATURE (oC)
5 3 4 5 6 7 8 9 10 11 SUPPLY VOLTAGE (V) 12 13 14 15
FIGURE 29. INPUT BIAS CURRENT CHANGE BETWEEN CHANNELS vs TEMPERATURE
FIGURE 30. DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE
269
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Typical Performance Curves
-30 AV = +1 VOUT = 2VP-P -40
VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified.
(Continued)
32 30 28 ENABLE TIME (ns) 26 24 22 20 18 16 14 -80 0.1 12 -2.5 -2.0 -1.5 -1.0 -0.5 0 0.5 DISABLE 1.0 1.5 2.0 DISABLE ENABLE ENABLE 20 18 16 14 12 10 8 6 4 2 0 2.5 DISABLE TIME (s) PHASE ANGLE (DEGREES)
SEPARATION (dBc)
-50
-60
-70
1 FREQUENCY (MHz)
10
30
OUTPUT VOLTAGE (V)
FIGURE 31. CHANNEL SEPARATION vs FREQUENCY
FIGURE 32. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE
10
0 -10 FEEDTHROUGH (dB) -20 -30 -40 -50 -60 -70 -80 0.1
DISABLE = 0V VIN = 5VP-P RF = 750 TRANSIMPEDANCE (M)
1 0.1 0.01 0.001
RL = 100
180 135 90 45 0 -45 -90
1 FREQUENCY (MHz)
10
20
0.001
0.01
0.1 1 10 FREQUENCY (MHz)
-135 100
FIGURE 33. DISABLE FEEDTHROUGH vs FREQUENCY
10 1 TRANSIMPEDANCE (M) 0.1 0.01 0.001
FIGURE 34. TRANSIMPEDANCE vs FREQUENCY
RL = 400 PHASE ANGLE (DEGREES)
180 135 90 45 0 -45 -90 -135
0.001
0.01
0.1 1 10 FREQUENCY (MHz)
100
FIGURE 35. TRANSIMPEDANCE vs FREQUENCY
270
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Application Information
Optimum Feedback Resistor The plots of inverting and non-inverting frequency response, see Figure 1 and Figure 2 in the Typical Performance Curves section, illustrate the performance of the HA5022 in various closed loop gain configurations. Although the bandwidth dependency on closed loop gain isn't as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier's unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier's bandwidth is inversely proportional to RF . The HA5022 design is optimized for a 1000 RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth.
GAIN (ACL) -1 +1 +2 +5 +10 -10 RF () 750 1000 681 1000 383 750 BANDWIDTH (MHz) 100 125 95 52 65 22
Driving Capacitive Loads
Capacitive loads will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases the oscillation can be avoided by placing an isolation resistor (R) in series with the output as shown in Figure 36.
VIN RT CL RI RF + R VOUT
-
FIGURE 36. PLACEMENT OF THE OUTPUT ISOLATION RESISTOR, R
The selection criteria for the isolation resistor is highly dependent on the load, but 27 has been determined to be a good starting value.
Power Dissipation Considerations
Due to the high supply current inherent in dual amplifiers, care must be taken to insure that the maximum junction temperature (TJ, see Absolute Maximum Ratings) is not exceeded. Figure 37 shows the maximum ambient temperature versus supply voltage for the available package styles. It is recommended that thermal calculations, which take into account output power, be performed by the designer.
175 MAX. AMBIENT TEMPERATURE 165 155 145 135 125 115 CERDIP
PC Board Layout
The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended. If leaded components are used the leads must be kept short especially for the power supply decoupling components and those components connected to the inverting input. Attention must be given to decoupling the power supplies. A large value (10F) tantalum or electrolytic capacitor in parallel with a small value (0.1F) chip capacitor works well in most cases. A ground plane is strongly recommended to control noise. Care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. It is recommended that the ground plane be removed under traces connected to IN, and that connections to -IN be kept as short as possible to minimize the capacitance from this node to ground.
5
7
9
11
13
15
SUPPLY VOLTAGE (V)
FIGURE 37. MAXIMUM OPERATING AMBIENT TEMPERATURE vs SUPPLY VOLTAGE
Enable/Disable Function
When enabled the amplifier functions as a normal current feedback amplifier with all of the data in the electrical specifications table being valid and applicable. When disabled the amplifier output assumes a true high impedance state and the supply current is reduced significantly. The circuit shown in Figure 38 is a simplified schematic of
271
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
the enable/disable function. The large value resistors in series with the DISABLE pin makes it appear as a current source to the driver. When the driver pulls this pin low current flows out of the pin and into the driver. This current, which may be as large as 350A when external circuit and process variables are at their extremes, is required to insure that point "A" achieves the proper potential to disable the output. The driver must have the compliance and capability of sinking all of this current.
+VCC R6 15K D1 R7 15K ENABLE/DISABLE INPUT R8 A QP3 R10 R33 QP18
of the actual signal switching takes place within the amplifier, it's differential gain and phase parameters, which are 0.03% and 0.03 degrees respectively, determine the circuit's performance. The other circuit, U1b, operates in a similar manner. When the plus supply rail is 5V the disable pin can be driven by a dedicated TTL gate as discussed earlier. If a multiplexer IC or its equivalent is used to select channels its logic must be break before make. When these conditions are satisfied the HA5022 is often used as a remote video multiplexer, and the multiplexer may be extended by adding more amplifier ICs.
Low Impedance Multiplexer
Two common problems surface when you try to multiplex multiple high speed signals into a low impedance source such as an A/D converter. The first problem is the low source impedance which tends to make amplifiers oscillate and causes gain errors. The second problem is the multiplexer which supplies no gain, introduces all kinds of distortion and limits the frequency response. Using op amps which have an enable/disable function, such as the HA5022, eliminates the multiplexer problems because the external mux chip is not needed, and the HA5022 can drive low impedance (large capacitance) loads if a series isolation resistor is used. Referring to Figure 40, both inputs are terminated in their characteristic impedance; 75 is typical for video applications. Since the drivers usually are terminated in their characteristic impedance the input gain is 0.5, thus the amplifiers, U2, are configured in a gain of +2 to set the circuit gain equal to one. Resistors R2 and R3 determine the amplifier gain, and if a different gain is desired R2 should be changed according to the equation G = (1 + R3/R2). R3 sets the frequency response of the amplifier so you should refer to the manufacturers data sheet before changing it's value. R5, C1 and D1 are an asymmetrical charge/discharge time circuit which configures U1 as a break before make switch to prevent both amplifiers from being active simultaneously. If this design is extended to more channels the drive logic must be designed to be break before make. R4 is enclosed in the feedback loop of the amplifier so that the large open loop amplifier gain of U2 will present the load with a small closed loop output impedance while keeping the amplifier stable for all values of load capacitance. The circuit shown in Figure 40 was tested for the full range of capacitor values with no oscillations being observed; thus, problem one has been solved. The frequency and gain characteristics of the circuit are now those of the amplifier independent of any multiplexing action; thus, problem two has been solved. The multiplexer transition time is approximately 15s with the component values shown.
FIGURE 38. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE FUNCTION
When VCC is +5V the DISABLE pin may be driven with a dedicated TTL gate. The maximum low level output voltage of the TTL gate, 0.4V, has enough compliance to insure that the amplifier will always be disabled even though D1 will not turn on, and the TTL gate will sink enough current to keep point "A" at its proper voltage. When VCC is greater than +5 volts the DISABLE pin should be driven with an open collector device that has a breakdown rating greater than VCC . Referring to Figure 8, it can be seen that R6 will act as a pull-up resistor to +VCC if the DISABLE pin is left open. In those cases where the enable/disable function is not required on all circuits some circuits can be permanently enabled by letting the DISABLE pin float. If a driver is used to set the enable/disable level, be sure that the driver does not sink more than 20A when the DISABLE pin is at a high level. TTL gates, especially CMOS versions, do not violate this criteria so it is permissible to control the enable/disable function with TTL.
Two Channel Video Multiplexer
Referring to the amplifier U1A in Figure 39, R1 terminates the cable in its characteristic impedance of 75, and R4 back terminates the cable in its characteristic impedance. The amplifier is set up in a gain configuration of +2 to yield an overall network gain of +1 when driving a double terminated cable. The value of R3 can be changed if a different network gain is desired. R5 holds the disable pin at ground thus inhibiting the amplifier until the switch, S1, is thrown to position 1. At position 1 the switch pulls the disable pin up to the plus supply rail thereby enabling the amplifier. Since all
272
HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
VIDEO INPUT #1 R1 75 R3 681
U1A 3 +1 24 R2 681
R4 75
VIDEO OUTPUT TO 75 LOAD
R5 2000 1 2 R9 75 R11 100 +5V S1 ALL OFF R10 2000
VIDEO INPUT #2 R6 75 R8 681
U1B 8 10 9 7 R7 681
3
NOTES: 1. U1 is HA5022 2. All resistors in 3. S1 is break before make 4. Use ground plane
+5V IN + 0.1F
+5V 10F
-5V IN 0.1F +
-5V 10F
FIGURE 39. TWO CHANNEL HIGH IMPEDANCE MULTIPLEXER
INPUT B R1A 75 INPUT A R1B 75 D1A 1N4148 R5A 2000 U1C C1A 0.047F R2B 681 R1A 681 1 2
R3A 681 U2A 16 4 R4A 27 -5V 0.01F
+
3
R3B 681 7 U2B - 10 6 + 13 5 R4B 27 OUTPUT +5V
CHANNEL SWITCH
0.01F R5B 2000 INHIBIT U1A R6 100K U1B U1D C1B 0.047F
NOTES: 1. U2: HA5022 2. U1: CD4011
D1B 1N4148
FIGURE 40. LOW IMPEDANCE MULTIPLEXER
273
Specifications HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (NOTE 12) TEST LEVEL HA5022I TEMPERATURE MIN TYP MAX UNITS
PARAMETER INPUT CHARACTERISTICS Input Offset Voltage (VIO)
A A
+25oC Full Full Full +25oC Full +25oC Full Full +25oC Full +25oC Full +25oC Full +25oC, +85oC -40oC +25oC, +85oC -40oC +25oC Full +25oC Full +25oC +25oC +25oC
53 50 60 55 2.5 -
0.8 1.2 5 3 4 10 6 10 4.5 2.5 25.0
3 5 3.5 8 20 0.15 0.5 0.1 0.3 12 30 15 30 0.4 1.0 0.2 0.5 -
mV mV mV V/oC dB dB dB dB V A A A/V A/V A/V A/V A A A A A/V A/V A/V A/V nV/Hz pA/Hz pA/Hz
Delta VIO Between Channels Average Input Offset Voltage Drift VIO Common Mode Rejection Ratio (Note 3)
A B A A
VIO Power Supply Rejection Ratio (Note 4)
A A
Input Common Mode Range (Note 3) Non-Inverting Input (+IN) Current
A A A
+IN Common Mode Rejection (Note 3) 1 -----(+ IBCMR = R - )
IN
A A A A
+IN Power Supply Rejection (Note 4)
Inverting Input (-IN) Current
A A
Delta -IN BIAS Current Between Channels
A A
-IN Common Mode Rejection (Note 3)
A A
-IN Power Supply Rejection (Note 4)
A A
Input Noise Voltage (f = 1kHz) +Input Noise Current (f = 1kHz) -Input Noise Current (f = 1kHz)
B B B
274
Specifications HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) (NOTE 12) TEST LEVEL HA5022I TEMPERATURE MIN TYP MAX UNITS
PARAMETER TRANSFER CHARACTERISTICS Transimpedance (Note 21)
A A
+25oC Full +25oC Full +25oC Full
1.0 0.85 70 65 50 45
-
-
M M dB dB dB dB
Open Loop DC Voltage Gain RL = 400, VOUT = 2.5V
A A
Open Loop DC Voltage Gain RL = 100, VOUT = 2.5V
A A
OUTPUT CHARACTERISTICS Output Voltage Swing (Note 20) A A Output Current (Note 20) Output Current (Short Circuit, Note 13) Output Current (Disabled, Notes 5, 14) Output Disable Time (Note 15) Output Enable Time (Note 16) Output Capacitance (Disabled, Notes 5, 17) POWER SUPPLY CHARACTERISTICS Supply Voltage Range Quiescent Supply Current A A +25oC Full 5 7.5 15 10 V mA/Op Amp mA/Op Amp mA A A B A A B B B +25oC Full Full Full Full +25oC +25oC +25oC 2.5 2.5 16.6 40 3.0 3.0 20.0 60 40 40 15 2 V V mA mA A s ns pF
Supply Current, Disabled (Note 5)
A
Full
-
5
7.5
Disable Pin Input Current (Note 5) Minimum Pin 8 Current to Disable (Note 6) Maximum Pin 8 Current to Enable (Note 7) AC CHARACTERISTICS (AV = +1) Slew Rate (Note 8) Full Power Bandwidth (Note 9) Rise Time (Note 10)
A A A
Full Full Full
350 -
1.0 -
1.5 20
B B B
+25oC +25oC +25oC
275 22 -
400 28 6
-
V/s MHz ns
275
Specifications HA5022
DESIGN INFORMATION (Continued)
The information contained in this section has been developed through characterization by Intersil Corporation and is for use as application and design information only. No guarantee is implied.
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) (NOTE 12) TEST LEVEL B B B B B B HA5022I TEMPERATURE +25oC +25oC +25oC +25oC +25oC +25oC MIN TYP 6 6 4.5 125 50 75 MAX UNITS ns ns % MHz ns ns
PARAMETER Fall Time (Note 10) Propagation Delay (Note 10) Overshoot -3dB Bandwidth (Note 11) Settling Time to 1%, 2V Output Step Settling Time to 0.25%, 2V Output Step AC CHARACTERISTICS (AV = +2, RF = 681) Slew Rate (Note 8) Full Power Bandwidth (Note 9) Rise Time (Note 10) Fall Time (Note 10) Propagation Delay (Note 10) Overshoot -3dB Bandwidth (Note 11) Settling Time to 1%, 2V Output Step Settling Time to 0.25%, 2V Output Step Gain Flatness 5MHz 20MHz AC CHARACTERISTICS (AV = +10, RF = 383) Slew Rate (Note 8) Full Power Bandwidth (Note 9) Rise Time (Note 10) Fall Time (Note 10) Propagation Delay (Note 10) Overshoot -3dB Bandwidth (Note 11) Settling Time to 1%, 2V Output Step Settling Time to 0.1%, 2V Output Step
B B B B B B B B B B B
+25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC
-
475 26 6 6 6 12 95 50 100 0.02 0.07
-
V/s MHz ns ns ns % MHz ns ns dB dB
B B B B B B B B B
+25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC
350 28 -
475 38 8 9 9 1.8 65 75 130
-
V/s MHz ns ns ns % MHz ns ns
276
Specifications HA5022
Electrical Specifications
V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) (NOTE 12) TEST LEVEL HA5022I TEMPERATURE MIN TYP MAX UNITS
PARAMETER VIDEO CHARACTERISTICS Differential Gain (Notes 18, 20) Differential Phase (Notes 18, 20) NOTES:
B B
+25oC +25oC
-
0.03 0.03
-
% Degrees
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operation under any of these conditions is not necessarily implied. 2. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle) output current should not exceed 15mA for maximum reliability. 3. VCM = 2.5V. At -40oC Product is tested at VCM = 2.25V because short test duration does not allow self heating. 4. 3.5V VS 6.5V. 5. Disable = 0V. 6. RL = 100, VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is considered disabled when -10mV VOUT +10mV. 7. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5024 remaining enabled. The HA5024 is considered disabled when the supply current has decreased by at least 0.5mA. 8. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points. 9. FPBW Slew Rate = ------------------ ; V PEAK = 2V PEAK 2V
10. RL = 100, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay. 11. RL = 400, VOUT = 100mV. 12. A. Production Tested; B. Guaranteed Limit or Typical based on characterization; C. Design Typical for information only. 13. VIN = 2.5V, VOUT = 0V. 14. VOUT = 2.5V, VIN = OV. 15. VIN = +2V, Disable = +5V to 0V. Measured from the 50% point of Disable to VOUT = 0V. 16. VIN = +2V, Disable = 0V to +5V. Measured from the 50% point of Disable to VOUT = 2V. 17. VIN = 0V, Force VOUT from 0V to 2.5V, tR = tF = 50ns. 18. Measured with a VM700A video tester using an NTC-7 composite VITS. 19. Maximum power dissipation, including output load, must be designed to maintain junction temperature below +175oC for die, and below +150oC for plastic packages. See Applications Information section for safe operating area information. 20. RL = 150 . 21. VOUT = 2.5V. At -40oC Product is tested at VOUT = 2.25V because short test duration does not allow self heating. 22. ESD Protection is for human body model tested per MIL-STD-883, Method 3015.7.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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